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authorEfraim Flashner <efraim@flashner.co.il>2023-06-20 10:41:24 +0300
committerEfraim Flashner <efraim@flashner.co.il>2023-07-12 16:48:28 +0300
commit1701b1244d15dc6e8b7b1fe7af5fe26a82a465ba (patch)
tree2deabfe3af1972a49f9068be6541e20e2b0d6fa8
parent4dd5fa9e766a164acd5f1b639e4ed1d0a917b203 (diff)
guix: cpu: Add gcc-architecture->micro-architecture-level mapping.
* guix/cpu.scm (gcc-architecture->micro-architecture-level): New variable.
-rw-r--r--guix/cpu.scm24
1 files changed, 23 insertions, 1 deletions
diff --git a/guix/cpu.scm b/guix/cpu.scm
index 30cd860a19..29ad883584 100644
--- a/guix/cpu.scm
+++ b/guix/cpu.scm
@@ -32,7 +32,8 @@
cpu-model
cpu-flags
- cpu->gcc-architecture))
+ cpu->gcc-architecture
+ gcc-architecture->micro-architecture-level))
;;; Commentary:
;;;
@@ -283,3 +284,24 @@ correspond roughly to CPU, a record as returned by 'current-cpu'."
(architecture
;; TODO: More architectures
architecture)))
+
+(define (gcc-architecture->micro-architecture-level gcc-architecture)
+ "Return a matching psABI micro-architecture, allowing optimizations for x86_64
+CPUs for compilers which don't allow for more focused optimizing."
+ ;; Matching gcc-architectures isn't an easy task, with the rule-of-thumb being
+ ;; 'Haswell and higher' qualify for x86_64-v3.
+ ;; https://gitlab.com/x86-psABIs/x86-64-ABI/-/blob/master/x86-64-ABI/low-level-sys-info.tex
+ (match gcc-architecture
+ ((or "grandridge" "graniterapids" "sierraforest" "tigerlake"
+ "sapphirerapids" "cooperlake" "icelake-server" "icelake-client"
+ "cannonlake" "knm" "knl" "skylake-avx512" "alderlake" "skylake"
+ "broadwell" "haswell"
+ "znver4" "znver3" "znver2" "znver1" "bdver4")
+ "x86_64-v3")
+ ((or "sandybridge" "tremont" "goldmont-plus" "goldmont" "silvermont"
+ "nehalem" "bonnell" "core2"
+ "btver2" "athalon" "k8-sse3" "k8" "bdver3" "bdver2" "bdver1" "btver1"
+ "amdfam10"
+ "lujiazui" "x86-64")
+ "x86_64-v1")
+ (_ gcc-architecture)))