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-rw-r--r-- | gnu/packages/fpga.scm | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index 50a19a00d6..96c37791f6 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -3,6 +3,7 @@ ;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org> ;;; Copyright © 2018, 2019, 2020 Tobias Geerinckx-Rice <me@tobias.gr> ;;; Copyright © 2019 Amin Bandali <bandali@gnu.org> +;;; Copyright © 2020 Vinicius Monego <monego@posteo.net> ;;; ;;; This file is part of GNU Guix. ;;; @@ -35,6 +36,7 @@ #:use-module (gnu packages tcl) #:use-module (gnu packages readline) #:use-module (gnu packages python) + #:use-module (gnu packages python-xyz) #:use-module (gnu packages bison) #:use-module (gnu packages check) #:use-module (gnu packages flex) @@ -381,6 +383,33 @@ simulator trace files (@dfn{FST}).") ;; Exception against free government use in tcl_np.c and tcl_np.h. (license (list license:gpl2+ license:expat license:tcl/tk)))) +(define-public python-migen + (package + (name "python-migen") + (version "0.9.2") + (source + (origin + ;; Tests fail in the PyPI tarball due to missing files. + (method git-fetch) + (uri (git-reference + (url "https://github.com/m-labs/migen") + (commit version))) + (file-name (git-file-name name version)) + (sha256 + (base32 "1kq11if64zj84gv4w1q7l16fp17xjxl2wv5hc9dibr1z3m1gy67l")))) + (build-system python-build-system) + (propagated-inputs + `(("python-colorama" ,python-colorama))) + (home-page "https://m-labs.hk/gateware/migen/") + (synopsis "Python toolbox for building complex digital hardware") + (description + "Migen FHDL is a Python library that replaces the event-driven +paradigm of Verilog and VHDL with the notions of combinatorial and +synchronous statements, has arithmetic rules that make integers always +behave like mathematical integers, and allows the design's logic to be +constructed by a Python program.") + (license license:bsd-2))) + (define-public python-myhdl (package (name "python-myhdl") |